Post subject: Re: 3in1 source code update with 512Mb version support.
Posted: Mon Jan 19, 2009 4:29 pm
Joined: Sun Apr 30, 2006 5:39 am Posts: 1560 Location: Canada, eh?
free2go2: sounds like the patch I did is overwritten by SC's loader or is just simply interfering with it entirely, as it works (boots without white screens) on all the cards I've tried it on - try turning off soft reset/cheats and things of that nature in SC's options. The patch pokepatch does has no hardware detect added (so it wouldn't white screen if 3in1 wasn't there, it just wouldn't detect anything in pal park just as if you had no GBA card in at all), it just changes out the GBA save chip bankswitching code from FLASH to SRAM to be compatible with the 3in1's SRAM when the time comes to read that data in.
I'm not certain one exists, but it should be possible to perform the patch as a cheat code (I know it's been done for rumble and browser on the old 3in1 versions at any rate.)
Post subject: Re: 3in1 source code update with 512Mb version support.
Posted: Mon Jan 26, 2009 12:58 am
Joined: Sat Jan 17, 2009 2:23 pm Posts: 5
cory1492: you are right! It is SC's Real Time Save (RTS) patch screws your pokepatch V2. By disabling RTS patch, I successfully migrated 6 Pokemons from FireRed to Pearl with the EZ 3-in-1 plus (512Mb NOR). Thanks!
Post subject: Re: 3in1 source code update with 512Mb version support.
Posted: Mon May 18, 2009 1:04 pm
Joined: Mon May 18, 2009 12:48 pm Posts: 2
When I program the psram, then read it back the first halfword is always 0x1500. How does one program the psram with a program that the gba can boot? Or do you have to have a bootloader or modify the program to boot with that first halfword as always 0x1500?
Almost all the card specific commands use 0x8000000 as part of the enable/command preamble routine, if you partially complete it or have set the wrong mode then you are going to be reading the asic's command buffer+partial RAM or the NOR's command buffer instead of just the actual PSRAM.
The basic method found that works with 3in1 (non-plus, I imagine it can be adapted for plus but I don't have one so don't look at me - look at the updated 3in1 code and see where psram now offsets to and adjust setRomPage for it)
Code:
// credits for finding this method belong to Rudolph entirely #define _PSRAM 0x08060000 // note this IS NOT the same as GBA base, it's offset by 3 'pages' instead! void WritePSRAM(u32 address,u8 *buffer,u32 size) // fake { uint32 i; u16* addr = (u16*)(address+0x8060000); u16* pData = (u16*)buffer; for(i=0;i<size;i+=2) { addr[i>>1] = pData[i>>1]; } }
/*..... later in your code .....*/
SetRompage(381); // tricking 3in1 into keeping data in psram after CloseNorWrite() by offsetting the first page we are going to use OpenNorWrite(); /* write data to psram here */ readWriteLoop() // pseudo-loop to read to psram { read = fread(buf, 1, LEN, gbaFile); WriteNorFlash(address, buf, LEN); } /* now that data has been written finish the 'trick'... */ CloseNorWrite(); SetRompage(384); // putting psram to GBA base address instead of offset like before bootGBA(); // it's now possible to boot the gba from 16M PSRAM at this point, closing write also sets psram as unwriteable // ****this is also the point where you'd want to read it back from GBA base address to see that it programmed properly!
Note the all important multi-starred comment right at the end there
Post subject: Re: 3in1 source code update with 512Mb version support.
Posted: Mon May 18, 2009 9:05 pm
Joined: Mon May 18, 2009 12:48 pm Posts: 2
I think that has got it! Thanks.
I was this " close to figuring it out on my own. I had tried going back one block then back two blocks and decided going backwards wasnt the solution, I assumed it was the read and not the write that was the problem. Hadnt noticed how many 0x1500's were in the ez flash code, might have seen that 0x08000000, 0x08020000, and 0x08040000 were in those routines but 0x08060000 is not, kind of obvious now but wasnt last night.
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